Various processes are known for forming integrated circuits and microelectronic devices. Among such processes is the so-called “damascene process,” which generally involves using a photoresist and etching processes to selectively remove material from the substrate or other dielectric material. For example, a photoresist material may be deposited on a silicon wafer and subsequently patterned, e.g., by exposure to ultraviolet light, an electron beam, or the like. The substrate may then be etched to remove portions of the substrate that are not protected by the photoresist, e.g., via exposure to a wet etching solution or a plasma.
Fin based field effect transistors, or FINFETs, are one type of microelectronic device that is often produced by a damascene or similar process. As will be understood in the art, production of a FINFET device may include a recess etching process, during which a wet etchant (e.g., a hydrofluoric or nitric acid based etchant) or a direct plasma may be used to remove sacrificial material (e.g., an oxide) to expose at least a portion of fin-like structures which may be embedded therein. Such recess etching processes may also be used to remove oxide and/or nitride coatings that may be present on the fin-like structures, so as to expose the fin material itself for further processing in the production of a microelectronic device.
Although such prior technologies can be effective to etch various materials, the inventors have found that it is becoming increasingly difficult to use them to produce microelectronic devices that are becoming smaller and more complex. This is particularly true with respect to the production of fin based field effect transistors, or FINFETs. Over time, technology trends have driven manufacturers to produce FINFETs that have relatively large fin height, but relatively small or varying fin pitch. The production of such devices with existing wet etching chemistries has proven difficult, due in part to an inability to compensate for variances in the etch rate of such solutions. Indeed, the inventors have observed that the etch rate of some wet etchants may depend on various factors such as fin height, fin pitch, composition of the material being etched, and amount of material being etched. As a result, some wet etchants may be unable to uniformly recess oxide and nitride materials used in a FINFET to the same level, a problem which can potentially lead to device failure.
For example, when hydrofluoric acid based wet etchants were used to perform recess etching in the production of FINFET devices having a fin height of ≥ about 35 nm and a fin pitch of ≤50 nm, the inventors observed that such etching chemistries produced an uneven recessed field height between fins. This uneven field height was further observed to hamper device isolation and to contribute to the generation of integration errors.
Performing the same recess etching with a dry direct plasma did not address the issue, as the plasma chemistry lacked the selectivity required for this application, resulting in fin erosion and/or implantation of plasma species into the fins.
Although the following Detailed Description will proceed with reference being made to illustrative embodiments, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art.